3.17.29 IA-64 Options
These are the `-m' options defined for the Intel IA-64 architecture.
Generate code for a big endian target. This is the default for HPUX.
Generate code for a little endian target. This is the default for AIX5
Generate (or don't) code for the GNU assembler. This is the default.
Generate (or don't) code for the GNU linker. This is the default.
Generate code that does not use a global pointer register. The result
is not position independent code, and violates the IA-64 ABI.
Generate (or don't) a stop bit immediately before and after volatile asm
Generate code that works around Itanium B step errata.
Generate (or don't) `in', `loc', and `out' register names for
the stacked registers. This may make assembler output more readable.
Disable (or enable) optimizations that use the small data section. This may
be useful for working around optimizer bugs.
Generate code that uses a single constant global pointer value. This is
useful when compiling kernel code.
Generate code that is self-relocatable. This implies `-mconstant-gp'.
This is useful when compiling firmware code.
Generate code for inline divides using the minimum latency algorithm.
Generate code for inline divides using the maximum throughput algorithm.
Don't (or do) generate assembler code for the DWARF2 line number debugging
info. This may be useful when not using the GNU assembler.
Generate code treating the given register range as fixed registers.
A fixed register is one that the register allocator can not use. This is
useful when compiling kernel code. A register range is specified as
two registers separated by a dash. Multiple register ranges can be
specified separated by a comma.
This document was generated
by Charlie & on June, 17 2001